I am working as a Post-Doctoral researcher in Mathematics and Computer Science (MCS) Division at Argonne National Laboratory (ANL) , Illinois, USA. I am working in Programming Models and Runtime Systems (PMRS) group at MCS and my supervisor is Dr. Pavan Balaji . I am presently working on Communication models for High Performance Computing Systems.

In the past, I was teaching at NMAM Institute of Technology(NMAMIT) , Nitte, Karnataka, India for a period of 11 years with a total of 16 years of teaching expereince. I received my Ph. D. degree from National Institute of Technology Karnataka (NITK) , Surathkal, Karnataka, India in the year 2015. I received my M. Tech. degree from Visvesvaraya Technological University (VTU) , Belagavi, Karnataka, India in the year 2008. I received my B. Tech. degree from Jawaharlal Nehru Technological University, Hyderabad (JNTU-H) in the year 2001.

For more information, please click here for the Curriculum Vitae

• Software Infrastructure and Programming Model to Enhance the Performance of Applications on Multi-core Platform

  Funding Agency Name: Department of Science and Technology, Govt. of India. Reference Number: DST/TDD/03 Amount sanctioned: Rs.15.98 Lakhs Awarded by: DST, Govt of India Duration: 2 Years (Dec 2009- Jan 2012)(as Co-PI) (Completed)

• Jun 2012 - Dec 2016 Principal Investigator of Professor Partner Ship Program with NVIDIA for GPU Education Center (GEC) (Formerly NVIDIA CUDA Teaching Centre)
• Aug 2012 - Aug 2013 Principal Investigator for AMD University Relations Program
• Aug 2007 - Aug 2010 Single Point of Contact (SPOC) for Intel (Obtained 100 class room Software License from Intel for Intel VTune Analyzer

• Parallel computing for preserving privacy using k-anonymisation algorithms from big data

  Sharath Yaji and B. Neelima

  International Journal of Big Data IntelligenceIJBDI) by Inderscience. Vol. 5 no. 3: PP: 1-10. https://www.inderscienceonline.com/doi/pdf/10.1504/IJBDI.2018.092659 2018

• High Performance Computing Education in an Indian Engineering Institute

  B. Neelima

  Journal of Parallel and Distributed Computing (JPDC) by Elsevier. Vol. 105: PP: 73-82. (DOI: "https://doi.org/10.1016/j.jpdc.2017.01.019"). 2017

• Perfromance Acceleration using Dynamic Parallelism of Kepler GPUs for Recursive Sorting algorithm

  B. Neelima, Bharath B. Shamsundar, Anjjan S. Narayan, Rithesh R. Prabhu and Crystal Gomes

  Concurrency and Computation: Practice and Experience(CCPE). Vol. 29, Issue 4. PP: 1-11. 2017. (DOI: 10.1002/cpe.3865) 2017

• Communication and computation optimization of concurrent kernels using kernel coalesce on a GPU

  B. Neelima, Prakash S. Raghavendra and G. Ram Mohana Reddy

  Concurrency and Computation: Practice and Experience(CCPE). Vol. 27, Issue 1, PP: 47-68. Jan, 2015. DOI: 10.1002/cpe.3194. 2015

• New Sparse Matrix Storage Format to Improve the Performance of Total SPMV Time

  B. Neelima, Prakash S. Raghavendra and G. Ram Mohana Reddy

  Scalable Computing: Practice and Experience (SCPE). Vol. 13(2). PP: 159-171. 2012

Conference Papers

• Privacy Preserving in Blockchain through Partial Homomorphic Encryption System.

  Sharath Yaji, Kajal Bangera and B. Neelima

  IEEE proceedings of Artificial Intelligence Meets Blockchain (AIMB) workshop, co-located with 25th IEEE International Conference on High Performance Computing, Data and Analytics (HiPC-18) held from 17th to 20th December, 2018 at Benguluru, India.

• Locality-Aware PMI Usage for Efficient MPI Startup.

  Ken Raffenetti, B. Neelima Masamichi Takagi, Dmitry Durnov and Pavan Balaji

  In Proceedings of IEEE International Conference on Computer and Communications (ICCC-18) held from 7th to 10th December, 2018 at Chengdu, China.

• Topology-Aware Collective Algorithm Selection in MPICH

  B. Neelima and Pavan Balaji

  Poster presented during Post-Doctoral Symposium held at Argonne National Laboratory, Illinois, USA on 8th November, 2018.

• Privacy preserving through aggregating wave equation as noise in differential privacy

  Sharath Yaji and B. Neelima

  In Proceedings of the 2018 International Conference on Data Science and Information Technology (DSIT-2018) held from 20th to 22nd July, 2018 at Singapore. PP: 122-127. Doi: 10.1145/3239283.3239313

• Performance analysis of DTLS protocol

  R. Madhu and B. Neelima

  In proceedings of 2017 International Conference on Intelligent Computing, Instrumentation and Control Technologies (ICICICT), 6th to 7th July, 2017, Kannur, Kerala, India. https://ieeexplore.ieee.org/abstract/document/8342584/. DOI: 10.1109/ICICICT1.2017.8342584

• Face Classification using Convolution Neural Networks

  Raghurama, Gururaja Rao P., Rajesh Poojary, Gajendra S Patagara, B. Neelima

  Proceedings of 6th International Engineering Symposium -2017 (IES-2017), held from 1st to 3rd March, 2017 at 100th Anniversary Hall, Kumamoto University, Japan.

• SWIFT: A Performance Accelerated Optimized String Matching Algorithm for Nvidia GPUs

  Sourabh S. Shenoy, Supriya Nayak U. and B. Neelima

  15th International Symposium on Parallel and Distributed Computing (ISPDC-16), 8th to 10th July, 2016 at FuZhou, china.

• Introducing High Performance Computing Concepts into Engineering Undergraduate Curriculum: A Success Story.

  B. Neelima and Jiajia Li

  Proceedings on Workshop on Education for High Performance Computing (EduHPC-15) co-located with the International Conference for High Performance Computing, Networking, Storage and Analysis (SC-15) organized by ACM and IEEE Computer Society from 15th to 20th Nov. 2015, Austin, Texas, USA.

• String Sorting on Multi and Many Threaded Architectures: A Comparative Study.

  B. Neelima, Anjjan S. Narayan and Rithesh G. Prabhu

  2014 International Conference on High Performance Computing and Applications. (ICHPCA-2014), Bhubaneswar, India. 22nd to 24th December, 2014.

• Yet Another Proposal for All Pair Shortest Path on GPU.

  B. Neelima, Rithesh G. Prabhu and Anjjan S. Narayan

  2014 International Conference on High Performance Computing and Applications. (ICHPCA-2014), Bhubaneswar, India. 22nd to 24th December, 2014.

• A GPU Framework for Sparse Matrix Vector Multiplication.

  B. Neelima, G. Ram Mohana Reddy and Prakash S. Raghavendra

  13th International Symposium on Parallel and Distributed Computing (ISPDC-14), 24th to 27th June, 2014 at Porquerolles Golden Island, France. PP: 1427-1436.

• Predicting an Optimal Sparse Matrix Format for SpMV Computation on GPU.

  B. Neelima, G. Ram Mohana Reddy and Prakash S. Raghavendra

  Workshop on Multithreaded Architectures and Applications (MTAAP-14), co-located with 28th IEEE International Parallel and Distributed Processing Symposium (IPDPS-14), 19th to 23rd May, 2014 at Arizona, USA. PP: 51-58.

• CSPR: Column only Sparse Matrix Representation for Performance Improvement on GPU Architecture.

  B. Neelima, and Prakash S. Raghvendra.

  International Conference on Parallel, Distributed Computing Technologies and Applications (PDCTA-2011) in conjunction with CCSEIT-2011, Tirunelvelli, Tamil Nadu, India. Organized by AIRCC (Academy and Industry Research Collaboration Center) at Manonmaniam Sundharanar University, 23rd to 25th, September-2011. Series: Communication in Computer and information Science (CCIS). Title: Advances in Parallel, Distributed Computing. Volume Num: 203. 1st Edition, 2011, XVIII, 694p.

• Multithreaded Programming Framework Development for gcc Infrastructure

  Niranjan N. Chiplunkar, B. Neelima and Deepak Rao M.

  3rd International conference on computer research and Development (ICCRD 2011), Shanghai, China. 11th-13th March 2011. PP: 54 – 57.

• Framework for Interactive and Semi-Automatic Program Optimization Tool for Multi Core Architectures

  B. Neelima, Prakash S. Raghavendra, and Niranjan N Chiplunkar

  International Conference on Computer and Information Science and Engineering (ICCISE)-2011, Duabi, Organized by World Academy of Science, Engineering and Technology (WASET), 25-27, January-2011.

• Recent Trends in Software and Hardware for GPGPU Computing: A Comprehensive Survey

  B. Neelima and Prakash S. Raghavendra

  Fifth International Conference on Industrial and Information Systems (ICIIS)-2010, at National Institute of Technology Karnataka, Surathkal, 29th July to 1st August-2010.

Posters

• Customized Face Classification to Reduce the Training Time: A Proposal

  Raghurama, Gururaja Rao P., Rajesh Poojary, Gajendra S Patagara, and B. Neelima

  at 9th Student Research Symposium (SRS) co-located with 23rd Annual IEEE International Conference on High Performance Computing, Data and Analytics (HiPC-2016), held during 19th to 22nd December, 2016 at Hyderabad, India.

• Data Cube 2.0: Data Dodecahedron (DRON) Operator using Euclid Model for OLAPing BIGDATA Aggregation

  Sharath Yaji and B. Neelima

  at the 9th Student Research Symposium (SRS) co-located with 23rd Annual IEEE International Conference on High Performance Computing, Data and Analytics (HiPC-2016), held during 19th to 22nd December, 2016 at Hyderabad, India.

• SWIFT: A Fast Enhanced String Matching Algorithm for Heterogeneous Architectures

  Sourabh S. Shenoy, Supriya Nayak U. and B. Neelima

  Student Research Symposium co-located with IEEE International Conference on High Performance Computing (HiPC-15) held at Bangalore, India from 16th to 19th December, 2015. (won the Best Poster Award from ACM-TCPP and IEEE Computer Society)

• Performance Improvement for Multi-Key Quick Sort using Kepler GPUs

  Bharath B.S., Amoolya U. Shetty, Ananya Rao, Supreetha Shetty, and B. Neelima

  Student research Symposium co-located with IEEE International Conference on High Performance Computing (HiPC-15) held at Bangalore, India from 16th to 19th December, 2015.

• BLSI: Bit Level Single Indexing of Sparse Matrix for GPU Architectures

  B. Neelima, Prakash S. Raghavendra and Jayavanth U. Shenoy

  Student research Symposium co-located with IEEE International Conference on High Performance Computing (HiPC-2011) Bangalore. 18th to 21st December-2011.

• C2O: Communicaiton and Computation Optimizer for the Graphics Processor Architecture

  B. Neelima, Prakash S. Raghavendra, Rashmi Mahima, Akshyaya L. Bhat and Ashik Kumar.

  Student research Symposium co-located with IEEE International Conference on High Performance Computing (HiPC-2011) Bangalore. 18th to 21st December-2011.

• Code Optimizations in LLVM Compiler

  B. Neelima, Adarsh Konchady, Shashikiran, Brenda Olivia Martis and Rayan Victar D’Souza

  Student research Symposium co-located with IEEE International Conference on High Performance Computing (HiPC-2011) Bangalore. 18th to 21st December-2011.

• Outstanding Contributions in Reviewing in Parallel Computing Awarded certificate of outstanding contributions in Reviewing in Parallel Computing Journal of Elsevier in October 2018 in recognition of the contributions made to the quality of journal.
• Outstanding Contributions in Reviewing in JPDC Awarded certificate of outstanding contributions in Reviewing in Journal of Parallel and Distributed Computing of Elsevier in September, 2018 in recognition of the contributions made to the quality of journal.
• Publons JPDC Top Reviewer 2018-19 For placing as the top reviewer of Journal of Parallel and Distributed computing on Publons' global reviewers database, determined by the number of peer review reports performed during the 2018-2019.
• Publons Peer Review Award-2018 For placing in the top 1% of reviewers in Computer Sceince on Publons' global reviewers database, determined by the number of peer review reports performed during the 2017-2018 award year.
• Best Poster Award (GTCx-India) Customized Face Classification to Reduce the Training time: A Proposal. GPU Technology Conference (GTCx) India, Organized by NVIDIA on 6th December, 2016 at Renaissance Convention Center, Mumbai, India
• Best Poster Award (HiPC-SRS-15) SWIFT: A Fast Enhanced String Matching Algorithm for Heterogeneous Architectures. Student Research Symposium (SRS) co-located with 22nd IEEE international Conference on High Performance Computing held at Bangalore, India from 16th to 19th December, 2015. Awarded by: Technical Committee on Parallel Processing (TCPP) of IEEE Computer Society, IEEE and ACM.
• Best Psoter Award - PoPL-Student Posters-2015 String Sorting on GPU using Hybrid Algorithms. Student Poster Session co-located with 42nd ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages (POPL 2015) held at Tata Institute of Fundamental Research, Mumbai, India during 12th to 18th January, 2015.
• Received IEEE-TCPP (Technical Committee on Parallel Processing) Travel Grant for attending 28th IEEE International Parallel and Distributed Processing Symposium held at Arizona, USA during 19th to 23rd May, 2014 to present a paper titled "Predicting an Optimal Sparse Matrix Format for SpMV Computation on GPU".
• Granted International Travel Grant from Department of Science and Technology, Govt. of India to attend a 13th International Symposium on Parallel and Distributed Computing. Held in France during 24th to 27th of June, 2014 to present a paper titled "A GPU Framework for Sparse Matrix Vector Multiplication on GPU".

• Member, Review Committee, The ACM SIGHPC/Intel Computational and Data Science Graduate Student Fellowship program for women and racial/ethnic underrepresented groups. May, 2019.
• Member, Program Committee, 5th European Workshop on Parallel and Distributed Computing Education for Undergraduate Student (Euro-EDUPAR-19), co-located with 25th Euro-PAR-19, Gottingen, Germany, 26th to 30th August, 2019.
• Member, Program Committee, Twelfth International Conference on Contemporary Computing (IC3-19), jointly organized by Jaypee Institute of Infomration Technology, India and University of Florida, USA, organized at Noida, India, 8th to 10th August, 2019.
• Member, Program Committee (CSE-Track), 2019 Grace Hopper Celebrations (GHC-19), Orlando, Florida, 1st to 4th, October, 2019.
• Member, Program Committee, The 20th IEEE International Workshop on Parallel and Distributed Sceintific and Engineering Computing, (PDSEC-19), co-located with 33rd IEEE International Parallel and Distributed Processing Symposium (IPDPS-19), Rio De Janeiro, Brazil, 20th to 24th May, 2019.
• Member, Program Committee-NCWIT Collegiate Award, National Center for Women and Information Technology (NWCIT-18), Boulder, Colarado, USA.
• Member, Program Committee-CSE Track, 2018 Grace Hopper Celebrations (GHC-18), Houston, Texas, USA, 26th to 28th, September, 2018.
• Member, Program Committee-Applications, 47th International Conference on Parallel Processing (ICPP-18), University of Oregon, Eugene, Oregon, USA, 13th to 16th August, 2018.
• Reviewer-Architecture Track, 47th International Conference on Parallel Processing (ICPP-18), University of Oregon, Eugene, Oregon, USA, 13th to 16th August, 2018.
• Member, Program Committee, Eleventh International Conference on Contemporary Computing (IC3-2018), jointly organized by Jaypee Institute of Information Technology (JIIT) and University of Florida, USA, Organized at JIIT, Noida, India from 2nd to 4th August, 2018.
• Member, Program Committee, 2018 IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics was held at Mangalore Institute of Technology and Engineering, Moodabidri, 13th to 14th August, 2018.
• Reviewer, Transactions on Parallel and Distributed Systems (TPDS), Published by IEEE
• Reviewer, Transactions on Cloud Computing (TCC), Published by IEEE
• Reviewer, Journal of Parallel and Distributed Computing (JPDC), Elsevier
• Reviewer, Parallel Computing, Systems and Applications, (PARCO), Published by Elsevier
• Member, Program Committee, Tenth International Conference on Contemporary Computing (IC3-2017), Jointly organized by Jaypee Institute of Information Technology (JIIT) and University of Florida, USA, Organized at JIIT, Noida, India from 10th to 12th August, 2017 and technically co-sponsored by TCPP and IEEE Computer Society.
• Member, Advisory Committee, National Symposium on Computing, Analytics and Networks (CAN-2017) to be held on 15th April, 2017 at Chitkara University, Himachal Pradesh.
• Member, Executive Committee, IEEE Mangalore Subsection for the Year 2016
• Member, Executive Committee, IEEE Computer Society Bangalore Section, Year 2017.
• Member, Organizing Committee, 23rd IEEE International Conference on High Performance Computing (HiPC-2016) to be held at Hyderabad during 19th to 22nd December, 2016. (Organizing member of the Annual Conference since the year 2012).
• Faculty Sponsor, NMAMIT IEEE Women In Engineering (WIE) Student Affinity Group, associated with IEEE, USA. Formation Date: 22nd September, 2016.
• Reviewer, for the Journal Concurrency and computation: Practice and Experience (CCPE) published from John Wiley.
• Reviewer, for the Journal Cluster Computing, The journal of Networks, Software Tools and Applications (CLUSTER) with an impact factor of 0.949. Cluster Computing is a peer reviewed journal from Springer publications.
• Member, Program Committee, 15th IEEE International Symposium on Parallel and Distributed Computing (ISPDC-2016) to be held from 8th to 10th July, 2016 at FuZhou, China.
• Member, Organizing Committee, IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER 2016), organized by Mangalore Sub-section to be held at National Institute of Technology Karnataka (NITK), Surathkal from 13th to 14th August, 2016.
• Faculty Sponsor, NMAMIT ACM-W Student Chapter, associated with ACM. Formation Date: 12th November, 2015.
• Member, Program Committee, 14th International Symposium on Parallel and Distributed Computing (ISPDC-2016), to be held at Limassol, Cyprus from 29th Jun to 2nd Jul, 2015.
• Member, Organizing Committee, for the 29th IEEE International Parallel and Distributed Processing Symposium (IPDPS-15) to be held during May 25th to 29th, 2015 at Hyderabad, INDIA.
• Member, Organizing Committee, for the 22nd annual IEEE International Conference on High Performance Computing (HiPC 2015) to be held Bangalore, India, during 16th to 19th, December, 2015.
• Member, Organizing Committee, the 1st Indian Symposium on Computer Systems (IndoSys-14), to be held at C-DAC Knowledge Park Campus in Bangalore from June 28-29, 2014, in cooperation with ACM India and IEEE Computer Society Bangalore Chapter.
• Member, Organizing Committee, for the 21st annual IEEE International Conference on High Performance Computing (HiPC 2014) held at the Hotel Cidade De Goa in Goa, India, during 17-20, December, 2014. 
• Member, Organizing Committee, for the 20th annual IEEE International Conference on High Performance Computing (HiPC 2013) held at Park Plaza Bengaluru in Bengaluru, India, December 18-21, 2013. 
• Member, Organizing Committee, for the 19th annual IEEE International Conference on High Performance Computing (HiPC 2012) held at the Le Meridien Hotel Hotel in Pune, India, December 18-21, 2012. 
• Session Chair at CCSEIT-2011, Tirunelvelli, Tamil Nadu, India. Organized by AIRCC (Academy and Industry Research Collaboration Center) at Manonmaniam Sundharanar University, 23-25, September-2011.